DocID024597 Rev 5 1361/1830
RM0351 Universal synchronous asynchronous receiver transmitter (USART)
1411
Bits 31:26 Reserved, must be kept at reset value.
Bit 25 TCBGT: Transmission complete before guard time completion.
This bit is used in Smartcard mode. It is set by hardware if the transmission of a frame
containing data has completed successfully (no NACK received from the card) and before
the guard time has elapsed (contrary to the TC flag which is set when the guard time has
elapsed).
An interrupt is generated if TCBGTIE=1 in USART_CR3 register. It is cleared by software,
by writing 1 to TCBGTCF in USART_ICR or by writing to the USART_TDR register.
0: Transmission not complete or transmission completed with error (i.e. NACK received from
the card)
1: Transmission complete (before Guard time has elapsed and no NACK received from the
smartcard).
Note: If the USART does not support the Smartcard mode, this bit is reserved and forced by
hardware to ‘0’. If the USART supports the Smartcard mode and the Smartcard mode
is enabled, the TCBGT reset value is 1.
Note: This bit is available on STM32L496xx/4A6xx devices only
Bits 24:23 Reserved, must be kept at reset value.
Bit 22 REACK: Receive enable acknowledge flag
This bit is set/reset by hardware, when the Receive Enable value is taken into account by
the USART.
When the wakeup from Stop mode is supported, the REACK flag can be used to verify that
the USART is ready for reception before entering Stop mode.
Bit 21 TEACK: Transmit enable acknowledge flag
This bit is set/reset by hardware, when the Transmit Enable value is taken into account by
the USART.
It can be used when an idle frame request is generated by writing TE=0, followed by TE=1
in the USART_CR1 register, in order to respect the TE=0 minimum period.
Bit 20 WUF: Wakeup from Stop mode flag
This bit is set by hardware, when a wakeup event is detected. The event is defined by the
WUS bit field. It is cleared by software, writing a 1 to the WUCF in the USART_ICR register.
An interrupt is generated if WUFIE=1 in the USART_CR3 register.
Note: When UESM is cleared, WUF flag is also cleared.
The WUF interrupt is active only in Stop mode.
If the USART does not support the wakeup from Stop feature, this bit is reserved and
forced by hardware to ‘0’.
Bit 19 RWU: Receiver wakeup from Mute mode
This bit indicates if the USART is in mute mode. It is cleared/set by hardware when a
wakeup/mute sequence is recognized. The mute mode control sequence (address or IDLE)
is selected by the WAKE bit in the USART_CR1 register.
When wakeup on IDLE mode is selected, this bit can only be set by software, writing 1 to the
MMRQ bit in the USART_RQR register.
0: Receiver in active mode
1: Receiver in mute mode
Bit 18 SBKF: Send break flag
This bit indicates that a send break character was requested. It is set by software, by writing
1 to the SBKRQ bit in the USART_RQR register. It is automatically reset by hardware during
the stop bit of break transmission.
0: No break character is transmitted
1: Break character will be transmitted
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