Single Wire Protocol Master Interface (SWPMI) RM0351
1492/1830 DocID024597 Rev 5
44.2 SWPMI main features
The SWPMI module main features are the following (see Figure 44.3.3: SWP bus states):
• Full-duplex communication mode
• Automatic SWP bus state management
• Automatic handling of Start of frame (SOF)
• Automatic handling of End of frame (EOF)
• Automatic handling of stuffing bits
• Automatic CRC-16 calculation and generation in transmission
• Automatic CRC-16 calculation and checking in reception
• 32-bit Transmit data register
• 32-bit Receive data register
• Multi software buffer mode for efficient DMA implementation and multi frame buffering
• Configurable bit-rate up to 2 Mbit/s
• Configurable interrupts
• CRC error, underrun, overrun flags
• Frame reception and transmission complete flags
• Slave resume detection flag
• Loopback mode for test purpose
• Embedded SWPMI_IO transceiver compliant with ETSI TS 102 613 technical
specification
• Dedicated mode to output SWPMI_RX, SWPMI_TX and SWPMI_SUSPEND signals
on GPIOs, in case of external transceiver connection
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