ST STM32L4 5 Series User Manual

DocID024597 Rev 5 1689/1830
RM0351 USB on-the-go full-speed (OTG_FS)
1774
47.15.29 OTG Host channel-x interrupt mask register (OTG_HCINTMSKx)
(x = 0..11, where x = Channel_number)
Address offset: 0x50C + (Channel_number × 0x20)
Reset value: 0x0000 0000
This register reflects the mask for each channel status described in the previous section.
Bits 31:11 Reserved, must be kept at reset value.
Bit 10 DTERR: Data toggle error
Bit 9 FRMOR: Frame overrun
Bit 8 BBERR: Babble error
Bit 7 TXERR: Transaction error
Indicates one of the following errors occurred on the USB.
CRC check failure
Timeout
Bit stuff error
False EOP
Bit 6 Reserved, must be kept at reset value .
Bit 5 ACK: ACK response received/transmitted interrupt
Bit 4 NAK: NAK response received interrupt
Bit 3 STALL: STALL response received interrupt
Bit 2 Reserved, must be kept at reset value .
Bit 1 CHH: Channel halted
Indicates the transfer completed abnormally either because of any USB transaction error or
in response to disable request by the application.
Bit 0 XFRC: Transfer completed
Transfer completed normally without any errors.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res.
1514131211109876543210
Res. Res. Res. Res. Res.
DTERR
M
FRM
ORM
BBERR
M
TXERR
M
Res. ACKM NAKM
STALL
M
Res. CHHM
XFRC
M
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ST STM32L4 5 Series Specifications

General

Brand	ST
Model	STM32L4 5 Series
Category	Microcontrollers
Language	English