ST STM32L4 5 Series - Page 253

DocID024597 Rev 5 253/1830
RM0351 Reset and clock control (RCC)
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Bit 2 SWPMI1EN: Single wire protocol clock enable
Set and cleared by software.
0: SWPMI1 clock disable
1: SWPMI1 clock enable
Bit 1 I2C4EN: I2C4 clock enable (This bit is reserved for STM32L475xx/476xx/486xx devices)
Set and cleared by software
0: I2C4 clock disabled
1: I2C4 clock enabled
Bit 0 LPUART1EN: Low power UART 1 clock enable
Set and cleared by software.
0: LPUART1 clock disable
1: LPUART1 clock enable