ST STM32L4 5 Series - Page 278

Reset and clock control (RCC) RM0351
278/1830 DocID024597 Rev 5
0x9C
RCC_CCIPR2
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res.
I2C4
SEL
[1:0]
Reset value
00
1. Only for STM32L475xx/476xx/486xx devices
2. Only for STM32L496xx/4A6xx devices
Table 34. RCC register map and reset values (continued)
Off-
set
Register
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12
11
10
9 8 7 6 5 4 3 2 1 0