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ST STM32L4 5 Series User Manual

ST STM32L4 5 Series
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DocID024597 Rev 5 673/1830
RM0351 Voltage reference buffer (VREFBUF)
674
21.3.2 VREFBUF calibration control register (VREFBUF_CCR)
Address offset: 0x04
Reset value: 0x0000 00XX
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res Res Res Res Res Res Res Res Res Res Res Res Res Res Res Res
1514131211109876543210
Res Res Res Res Res Res Res Res Res Res Res Res VRR VRS HIZ ENVR
rrwrwrw
Bits 31:4 Reserved, must be kept at reset value.
Bit 3 VRR: Voltage reference buffer ready
0: the voltage reference buffer output is not ready.
1: the voltage reference buffer output reached the requested level.
Bit 2 VRS: Voltage reference scale
This bit selects the value generated by the voltage reference buffer.
0: Voltage reference set to V
REF_OUT1
(around 2.048 V).
1: Voltage reference set to V
REF_OUT2
(around 2.5 V).
Bit 1 HIZ: High impedance mode
This bit controls the analog switch to connect or not the VREF+ pin.
0: VREF+ pin is internally connected to the voltage reference buffer output.
1: VREF+ pin is high impedance.
Refer to Table 138: VREFBUF buffer modes for modes descriptions depending on ENVR bit
configuration.
Bit 0 ENVR: Voltage reference buffer enable
This bit is used to enable the voltage reference buffer.
0: Internal voltage reference disable.
1: Internal voltage reference enable.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res Res Res Res Res Res Res Res Res Res Res Res Res Res Res Res
1514131211109876543210
Res Res Res Res Res Res Res Res Res Res TRIM[5:0]
rw rw rw rw rw rw
Bits 31:6 Reserved, must be kept at reset value.
Bits 5:0 TRIM[5:0]: Trimming code
These bits are automatically initialized after reset with the trimming value stored in the Flash
during production test. Writing into these bits allows to tune the internal reference buffer
voltage.

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ST STM32L4 5 Series Specifications

General IconGeneral
BrandST
ModelSTM32L4 5 Series
CategoryMicrocontrollers
LanguageEnglish

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