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ST STM32L4 5 Series - Page 734

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Digital filter for sigma delta modulators (DFSDM) RM0351
734/1830 DocID024597 Rev 5
24.8 DFSDM filter x module registers (x=0..3)
24.8.1 DFSDM control register 1 (DFSDM_FLTxCR1)
Address offset: 0x100 + 0x80 * x, x = 0...3
Reset value: 0x0000 0000
Bits 31:16 INDAT0[15:0]: Input data for channel y or channel y+1
Input parallel channel data to be processed by the digital filter if DATMPX[1:0]=1 or DATMPX[1:0]=2.
Data can be written by CPU/DMA (if DATMPX[1:0]=2) or directly by internal ADC (only for
STM32L496xx/4A6xx devices, ifDATMPX[1:0]=1).
If DATPACK[1:0]=0 (standard mode)
INDAT0[15:0] is write protected (not used for input sample).
If DATPACK[1:0]=1 (interleaved mode)
Second channel y data sample is stored into INDAT1[15:0]. First channel y data sample is stored
into INDAT0[15:0]. Both samples are read sequentially by DFSDM_FLTx filter as two channel y
data samples.
If DATPACK[1:0]=2 (dual mode).
For even y channels: sample in INDAT1[15:0] is automatically copied into INDAT0[15:0] of
channel (y+1).
For odd y channels: INDAT1[15:0] is write protected.
See Section 24.4.6: Parallel data inputs for more details.
INDAT0[15:1] is in the16-bit signed format.
Bits 15:0 INDAT0[15:0]: Input data for channel y
Input parallel channel data to be processed by the digital filter if DATMPX[1:0]=1 or DATMPX[1:0]=2.
Data can be written by CPU/DMA (if DATMPX[1:0]=2) or directly by internal ADC (only for
STM32L496xx/4A6xx devices, if DATMPX[1:0]=1).
If DATPACK[1:0]=0 (standard mode)
Channel y data sample is stored into INDAT0[15:0].
If DATPACK[1:0]=1 (interleaved mode)
First channel y data sample is stored into INDAT0[15:0]. Second channel y data sample is stored
into INDAT1[15:0]. Both samples are read sequentially by DFSDM_FLTx filter as two channel y
data samples.
If DATPACK[1:0]=2 (dual mode).
For even y channels: Channel y data sample is stored into INDAT0[15:0].
For odd y channels: INDAT0[15:0] is write protected.
See Section 24.4.6: Parallel data inputs for more details.
INDAT0[15:0] is in the16-bit signed format.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res.
AWF
SEL
FAST Res. Res. RCH[2:0] Res. Res.
RDMA
EN
Res. RSYNC
RCON
T
RSW
START
Res.
rw rw rw rw rw rw rw rw r0w
1514131211109876543210
Res. JEXTEN[1:0] Res. Res. JEXTSEL[2:0] Res. Res.
JDMA
EN
JSCAN JSYNC Res.
JSW
START
DFEN
rw rw rw rw rw rw rw rw r0w rw

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