EasyManuals Logo

Intel Arria 10 User Manual

Intel Arria 10
607 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Page #473 background imageLoading...
Page #473 background image
5.2.2.6.1. PRBS Checker
You can use Arria 10 pseudo-random bit stream (PRBS) checker to easily characterize
high-speed links without developing or fully implementing any upper layer of a
protocol stack. The PRBS checker in Arria 10 devices is a shared hardened block
between the Standard and Enhanced datapaths. Hence, there is only one set of control
signals and registers for this feature.
You can use the PRBS checker block to verify the pattern generated by the PRBS
generator. The PRBS checker can be configured for two widths of the PCS-PMA
interface: 10 bits and 64 bits. PRBS9 is available in both 10-bit and 64-bit PCS-PMA
widths. All other PRBS patterns are available in 64-bit PCS-PMA width only. The PRBS
checker patterns can only be used when the PCS-PMA interface width is configured to
10 bits or 64 bits.
The pseudo-random bit stream (PRBS) block verifies the pattern generated by the
PRBS generator. The verifier supports the 64-bit PCS-PMA interface. PRBS7 supports
64-bit width only. PRBS9 supports 10-bit PMA data width to allow testing at a lower
data rate.
Table 256. Supported PRBS Patterns
PRBS Pattern 10 bit PCS-PMA width 64 bit PCS-PMA width
PRBS7: x
7
+ x
6
+ 1 Yes
PRBS9: x
9
+ x
5
+ 1 Yes Yes
PRBS15: x
15
+ x
14
+ 1 Yes
PRBS23: x
23
+ x
18
+ 1 Yes
PRBS31: x
31
+ x
28
+ 1 Yes
Figure 246. PRBS9 Verify Serial Implementation
S0 S1 S4 S5 S8
PRBS Error
PRBS datain
5. Arria 10 Transceiver PHY Architecture
UG-01143 | 2018.06.15
Intel
®
Arria
®
10 Transceiver PHY User Guide
473

Table of Contents

Questions and Answers:

Question and Answer IconNeed help?

Do you have a question about the Intel Arria 10 and is the answer not in the manual?

Intel Arria 10 Specifications

General IconGeneral
Transceiver Data RateUp to 17.4 Gbps
Transceiver Protocols SupportedCPRI, JESD204B
Transceiver Power ConsumptionVaries depending on configuration and data rate. Refer to Intel Arria 10 device power estimation tools.
Transceiver FeaturesClock data recovery
Power Consumption per ChannelVaries depending on data rate and equalization settings. Refer to Intel Arria 10 device power estimation tools.
Transceiver TypeFPGA integrated transceiver
Operating Temperature Range-40°C to 100°C (Industrial)
Number of Transceiver Channelsup to 96 full-duplex

Related product manuals