Renesas RL78 Series - Page 1208

RL78/F13, F14 CHAPTER 17 LIN/UART MODULE (RLIN3)
R01UH0368EJ0210 Rev.2.10 1176
Dec 10, 2015
(11) LIN/UART Space Configuration Register (LSCn)
Address: F06CAH
7 6 5 4 3 2 1 0
— — IBS[1:0] — — — —
Value after reset:
0 0 0 0 0 0 0 0
Bit Symbol Bit Name Function R/W
2 to 0 — Reserved These bits are always read as 0. The write value should always
be 0.
R/W
3 — Reserved This bit is always read as 0. The write value should always be
0.
R/W
5, 4 IBS[1:0] Inter-Byte Space Select
b5 b4
0 0: 0 Tbit
0 1: 1 Tbit
1 0: 2 Tbits
1 1: 3 Tbits
R/W
7, 6 — Reserved These bits are always read as 0. The write value should always
be 0.
R/W
Set the LSCn register when the OMM0 bit in the LMSTn register is 0 (LIN reset mode).
IBS[1:0] bits (Inter-byte space select bits)
The IBS bits set the width of the space between UART frames in transmission using UART buffer.
0 Tbit to 3 Tbits can be set.
When transmitting from the transmission buffer(LUTDRn register) and the wait transmission buffer(LUWTDRn register),set
00b to the IBS[1:0] bit.
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