Scanlab RTC6 PCIe Board - Initialization with RTC6 Software Package  1.5.0 ( RBF 619); Initialization with RTC6 Software Package < V1.5.0 ( RBF 618)

RTC6 boards
Doc. Rev. 1.0.21 en-US
6 Developing RTC6-User Programs
125
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Initialization with RTC6 Software
Package 
1.5.0 (

RBF 619)
On all RTC6 PCIe Boards of a master/slave chain must
have been executed:
• load_program_file
Clock Phase Synchronization
The synchronization takes place automatically as
soon as 2 RTC6 PCIe Boards are connected.
sync_slaves does not have to be called anymore.
The synchronization status can be queried at any time
with get_sync_status even without a prior call of
simulate_ext_start.
If an RTC6 PCIe Board has been synchronized to
external clock cycles in the meantime (see
Chapter 7.4.10 ”Synchronization of the RTC6 Clock
Cycle and an External Clock Signal”, page 207), it is
automatically resynchronized with the master board
upon leaving this state.
When load_program_file is executed, the
synchronization of all subsequent slave boards is lost
for a short time. However, it is automatically
reestablished.
Notes
• The master board does not pass encoder signals
to the slave board(s). They must always be
individually supplied to the slave board(s). Here,
you need to take into account the 0 ns…50 ns
clock phase shift.
• The correction files and lists must be loaded
separately onto all RTC6 PCIe Boards.
• By get_sync_status ( Bit #21 … Bit #30 ), the exact
propagation time in 1/64 µs clock cycles between
two RTC6 boards (outbound and return) can be
read out.
Initialization with RTC6 Software Package
< V1.5.0 (
RBF 618)
On all RTC6 PCIe Boards of a master/slave chain must
have been executed:
• load_program_file
• load_correction_file
The synchronous timing with stable phase position of
a master/slave chain is severed by the first not-
initialized board. If an RTC6 PCIe Board is initialized
by load_program_file but connected as slave to a
board which has not been initialized by
load_program_file, then it is subject to its own clock
with a random phase position.
Clock Ph
ase Synchronization
If
the RTC6 PCIe Boards of a master/slave chain are to
be synchronously clocked with a defined relative
clock phase, then the boards must be
correspondingly synchronized by sync_slaves.
For this, it is necessary to send sync_slaves one-time
to the master board only. SCANLAB recommends
performing the synchronization immediately after all
boards have been initialized (by load_program_file
and load_correction_file). It is sufficient to call
load_correction_file(0,1,2) or to temporarily detach
all scan heads.
Notes
• The master board does not pass encoder signals
to the slave board(s). They must always be
individually supplied to the slave board(s). Here,
you need to take into account the 0 ns…50 ns
clock phase shift.
• If a board in a synchronized master/slave chain is
externally clocked separately by a cycle
synchronization, then this clocking refers
exclusively to this board. All other boards in the
master/slave chain continue to be synchronized
with the original clock of the master board. If
cycle synchronization is then deactivated again,
the affected card remains asynchronous. It can
only be synchronized again by calling
sync_slaves once more.
• The correction file and lists must be loaded
separately onto all RTC6 PCIe Boards.