DocID024597 Rev 5 1371/1830
RM0351 Low-power universal asynchronous receiver transmitter (LPUART)
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41.2 LPUART main features
• Full-duplex asynchronous communications
• NRZ standard format (mark/space)
• Programmable baud rate from 300 baud/s to 9600 baud/s using a 32.768 kHz clock
source. Higher baud rates can be achieved by using a higher frequency clock source
• Dual clock domain allowing
– UART functionality and wakeup from Stop mode
– Convenient baud rate programming independent from the PCLK reprogramming
• Programmable data word length (7 or 8 or 9 bits)
• Programmable data order with MSB-first or LSB-first shifting
• Configurable stop bits (1 or 2 stop bits)
• Single-wire Half-duplex communications
• Continuous communications using DMA
• Received/transmitted bytes are buffered in reserved SRAM using centralized DMA.
• Separate enable bits for transmitter and receiver
• Separate signal polarity control for transmission and reception
• Swappable Tx/Rx pin configuration
• Hardware flow control for modem and RS-485 transceiver
• Transfer detection flags:
– Receive buffer full
– Transmit buffer empty
– Busy and end of transmission flags
• Parity control:
– Transmits parity bit
– Checks parity of received data byte
• Four error detection flags:
– Overrun error
– Noise detection
– Frame error
– Parity error
• Fourteen interrupt sources with flags
• Multiprocessor communications
The LPUART enters mute mode if the address does not match.
• Wakeup from mute mode (by idle line detection or address mark detection)
41.3 LPUART implementation
The STM32L4x5/STM32L4x6 devices embed one LPUART. Refer to Section 40.4: USART
implementation for LPUART supported features.
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