Low-power universal asynchronous receiver transmitter (LPUART) RM0351
1372/1830 DocID024597 Rev 5
41.4 LPUART functional description
Any LPUART bidirectional communication requires a minimum of two pins: Receive data In
(RX) and Transmit data Out (TX):
• RX: Receive data Input.
This is the serial data input.
• TX: Transmit data Output.
When the transmitter is disabled, the output pin returns to its I/O port configuration.
When the transmitter is enabled and nothing is to be transmitted, the TX pin is at high
level. In Single-wire mode, this I/O is used to transmit and receive the data.
Through these pins, serial data is transmitted and received in normal LPUART mode as
frames comprising:
• An Idle Line prior to transmission or reception
• A start bit
• A data word (7 or 8 or 9 bits) least significant bit first
• 1, 2 stop bits indicating that the frame is complete
• The LPUART interface uses a baud rate generator
• A status register (LPUART_ISR)
• Receive and transmit data registers (LPUART_RDR, LPUART_TDR)
• A baud rate register (LPUART_BRR)
Refer to Section 41.7: LPUART registers for the definitions of each bit.
The following pins are required in RS232 Hardware flow control mode:
• CTS: Clear To Send blocks the data transmission at the end of the current transfer
when high
• RTS: Request to send indicates that the LPUART is ready to receive data (when low).
The following pin is required in RS485 Hardware control mode:
• DE: Driver Enable activates the transmission mode of the external transceiver.
Note: DE and RTS share the same pin.
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