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ST STM32L4 5 Series User Manual

ST STM32L4 5 Series
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DocID024597 Rev 5 1513/1830
RM0351 Single Wire Protocol Master Interface (SWPMI)
1517
44.6.5 SWPMI Interrupt Enable register (SMPMI_IER)
Address offset: 0x14
Reset value: 0x0000 0000
Bits 31:9 Reserved, must be kept at reset value
Bit 8 CSRF: Clear slave resume flag
Writing 1 to this bit clears the SRF flag in the SWPMI_ISR register
Writing 0 to this bit does not have any effect
Bit 7 CTCF: Clear transfer complete flag
Writing 1 to this bit clears the TCF flag in the SWPMI_ISR register
Writing 0 to this bit does not have any effect
Bits 6:5 Reserved, must be kept at reset value
Bit 4 CTXUNRF: Clear transmit underrun error flag
Writing 1 to this bit clears the TXUNRF flag in the SWPMI_ISR register
Writing 0 to this bit does not have any effect
Bit 3 CRXOVRF: Clear receive overrun error flag
Writing 1 to this bit clears the RXBOCREF flag in the SWPMI_ISR register
Writing 0 to this bit does not have any effect
Bit 2 CRXBERF: Clear receive CRC error flag
Writing 1 to this bit clears the RXBERF flag in the SWPMI_ISR register
Writing 0 to this bit does not have any effect
Bit 1 CTXBEF: Clear transmit buffer empty flag
Writing 1 to this bit clears the TXBEF flag in the SWPMI_ISR register
Writing 0 to this bit does not have any effect
Bit 0 CRXBFF: Clear receive buffer full flag
Writing 1 to this bit clears the RXBFF flag in the SWPMI_ISR register
Writing 0 to this bit does not have any effect
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res.
1514131211109876543210
Res. Res. Res. Res. Res. Res. Res. SRIE TCIE TIE RIE
TXUNR
EIE
RXOVR
EIE
RXBEI
E
TXBERI
E
RXBFIE
rw rw rw rw rw rw rw rw rw
Bits 31:9 Reserved, must be kept at reset value
Bit 8 SRIE: Slave resume interrupt enable
0: Interrupt is inhibited
1: An SWPMI interrupt is generated whenever SRF flag is set in the SWPMI_ISR register
Bit 7 TCIE: Transmit complete interrupt enable
0: Interrupt is inhibited
1: An SWPMI interrupt is generated whenever TCF flag is set in the SWPMI_ISR register

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ST STM32L4 5 Series Specifications

General IconGeneral
BrandST
ModelSTM32L4 5 Series
CategoryMicrocontrollers
LanguageEnglish

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