Single Wire Protocol Master Interface (SWPMI) RM0351
1514/1830 DocID024597 Rev 5
44.6.6 SWPMI Receive Frame Length register (SWPMI_RFL)
Address offset: 0x18
Reset value: 0x0000 0000
Bit 6 TIE: Transmit interrupt enable
0: Interrupt is inhibited
1: An SWPMI interrupt is generated whenever TXE flag is set in the SWPMI_ISR register
Bit 5 RIE: Receive interrupt enable
0: Interrupt is inhibited
1: An SWPMI interrupt is generated whenever RXNE flag is set in the SWPMI_ISR register
Bit 4 TXUNRIE: Transmit underrun error interrupt enable
0: Interrupt is inhibited
1: An SWPMI interrupt is generated whenever TXBUNRF flag is set in the SWPMI_ISR
register
Bit 3 RXOVRIE: Receive overrun error interrupt enable
0: Interrupt is inhibited
1: An SWPMI interrupt is generated whenever RXBOVRF flag is set in the SWPMI_ISR
register
Bit 2 RXBERIE: Receive CRC error interrupt enable
0: Interrupt is inhibited
1: An SWPMI interrupt is generated whenever RXBERF flag is set in the SWPMI_ISR
register
Bit 1 TXBEIE: Transmit buffer empty interrupt enable
0: Interrupt is inhibited
1: An SWPMI interrupt is generated whenever TXBEF flag is set in the SWPMI_ISR register
Bit 0 RXBFIE: Receive buffer full interrupt enable
0: Interrupt is inhibited
1: An SWPMI interrupt is generated whenever RXBFF flag is set in the SWPMI_ISR register
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res.
1514131211109876543210
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. RFL[4:0]
rrrrr
Bits 31:5 Reserved, must be kept at reset value
Bits 4:0 RFL[4:0]: Receive frame length
RFL[4:0] is the number of data bytes in the payload of the received frame. The two least
significant bits RFL[1:0] give the number of relevant bytes for the last SWPMI_RDR register
read.
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