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ST STM32L4 5 Series - Page 1516

ST STM32L4 5 Series
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Single Wire Protocol Master Interface (SWPMI) RM0351
1516/1830 DocID024597 Rev 5
Bits 31:2 Reserved, must be kept at reset value
Bit 1 SWP_CLASS: SWP class selection
This bit is used to select the SWP class (refer to Section 44.3.2: SWP initialization and
activation).
0: Class C: SWPMI_IO uses directly VDD voltage to operate in class C.
This configuration must be selected when VDD is in the range [1.62 V to 1.98 V]
1: Class B: SWPMI_IO uses an internal voltage regulator to operate in class B.
This configuration must be selected when VDD is in the range [2.70 V to 3.30 V]
Bit 0 SWP_TBYP: SWP transceiver bypass
This bit is used to bypass the internal transceiver (SWPMI_IO), and connect an external
transceiver.
0: Internal transceiver is enabled. The external interface for SWPMI is SWPMI_IO
(SWPMI_RX, SWPMI_TX and SWPMI_SUSPEND signals are not available on GPIOs)
1: Internal transceiver is disabled. SWPMI_RX, SWPMI_TX and SWPMI_SUSPEND signals
are available as alternate function on GPIOs. This configuration is selected to connect an
external transceiver

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