ST STM32L4 5 Series User Manual

Reset and clock control (RCC) RM0351
272/1830 DocID024597 Rev 5
6.4.31 Clock recovery RC register (RCC_CRRCR)
(a)
Address: 0x98
Reset value: 0x0000 XXX0 where X is factory-programmed.
Access: no wait state, word, half-word and byte access
Bits 11:8 MSISRANGE[3:1] MSI range after Standby mode
Set by software to chose the MSI frequency at startup. This range is used after exiting
Standby mode until MSIRGSEL is set. After a pad or a power-on reset, the range is always
4 MHz. MSISRANGE can be written only when MSIRGSEL = ‘1’.
0100: Range 4 around 1 MHz
0101: Range 5 around 2 MHz
0101: Range 6 around 4 MHz (reset value)
0111: Range 7 around 8 MHz
others: Reserved
Note: Changing the MSISRANGE does not change the current MSI frequency.
Bits 7:2 Reserved, must be kept at reset value.
Bit 1 LSIRDY: LSI oscillator ready
Set and cleared by hardware to indicate when the LSI oscillator is stable. After the LSION bit
is cleared, LSIRDY goes low after 3 LSI oscillator clock cycles. This bit can be set even if
LSION = 0 if the LSI is requested by the Clock Security System on LSE, by the Independent
Watchdog or by the RTC.
0: LSI oscillator not ready
1: LSI oscillator ready
Bit 0 LSION: LSI oscillator enable
Set and cleared by software.
0: LSI oscillator OFF
1: LSI oscillator ON
a. Register is present on L496/L4A6 devices only.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res.
1514131211109 8765432 1 0
HSI48CAL[8:0] Res. Res. Res. Res. Res.
HSI48
RDY
HSI48
ON
r r rrrr r r r rrw
Bits 31:16 Reserved, must be kept at reset value
Bits 15:7 HSI48CAL[8:0]: HSI48 clock calibration
These bits are initialized at startup with the factory-programmed HSI48 calibration trim value.
They are ready only.

ST STM32L4 5 Series Specifications

General

Brand	ST
Model	STM32L4 5 Series
Category	Microcontrollers
Language	English