Direct memory access controller (DMA) RM0351
356/1830 DocID024597 Rev 5
Refer to Section 2.2.2 on page 75 for the register boundary addresses.
0x88
DMA_CPAR7 PA[31:0]
Reset value 00000000000000000000000000000000
0x8C
DMA_CMAR7 MA[31:0]
Reset value 00000000000000000000000000000000
0x90 -
0xA7
Reserved
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
0xA8
DMA_CSELR
Res.
Res.
Res.
Res.
C7S[3:0] C6S[3:0] C5S[3:0] C4S[3:0] C3S[3:0] C2S[3:0] C1S[3:0]
Reset value 0000000000000000000000000000
Table 47. DMA register map and reset values (continued)
Offset Register
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
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