EasyManuals Logo

ST STM32L4 5 Series User Manual

ST STM32L4 5 Series
1830 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Page #357 background imageLoading...
Page #357 background image
DocID024597 Rev 5 357/1830
RM0351 Chrom-Art Accelerator™ controller (DMA2D)
391
12 Chrom-Art Accelerator™ controller (DMA2D)
The DMA2D is present on L496/L4A6 devices only.
12.1 DMA2D introduction
The Chrom-Art Accelerator™ (DMA2D) is a specialized DMA dedicated to image
manipulation. It can perform the following operations:
Filling a part or the whole of a destination image with a specific color
Copying a part or the whole of a source image into a part or the whole of a destination
image
Copying a part or the whole of a source image into a part or the whole of a destination
image with a pixel format conversion
Blending a part and/or two complete source images with different pixel format and copy
the result into a part or the whole of a destination image with a different color format.
All the classical color coding schemes are supported from 4-bit up to 32-bit per pixel with
indexed or direct color mode. The DMA2D has its own dedicated memories for CLUTs (color
look-up tables).
12.2 DMA2D main features
The main DMA2D features are:
Single AHB master bus architecture.
AHB slave programming interface supporting 8/16/32-bit accesses (except for CLUT
accesses which are 32-bit).
User programmable working area size
User programmable offset for sources and destination areas
User programmable sources and destination addresses on the whole memory space
Up to 2 sources with blending operation
Alpha value can be modified (source value, fixed value or modulated value)
User programmable source and destination color format
Up to 11 color formats supported from 4-bit up to 32-bit per pixel with indirect or direct
color coding
2 internal memories for CLUT storage in indirect color mode
Automatic CLUT loading or CLUT programming via the CPU
User programmable CLUT size
Internal timer to control AHB bandwidth
4 operating modes: register-to-memory, memory-to-memory, memory-to-memory with
pixel format conversion, and memory-to-memory with pixel format conversion and
blending

Table of Contents

Questions and Answers:

Question and Answer IconNeed help?

Do you have a question about the ST STM32L4 5 Series and is the answer not in the manual?

ST STM32L4 5 Series Specifications

General IconGeneral
BrandST
ModelSTM32L4 5 Series
CategoryMicrocontrollers
LanguageEnglish

Related product manuals