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ST STM32L4 5 Series User Manual

ST STM32L4 5 Series
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Chrom-Art Accelerator™ controller (DMA2D) RM0351
388/1830 DocID024597 Rev 5
12.5.22 DMA2D IP identification register (DMA2D_IPIDR)
Address offset: 0x03F8
Reset value: 0x0016 0041
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res Res Res Res Res Res Res Res Res Res Res Res Res Res Res Res
1514131211109876543210
Res Res Res Res Res Res Res Res MAJREV[3:0] MINREV[3:0]
rr
Bits 31:8 Reserved, can be used for some special purpose.
Bits 7:4 MAJREV[3:0]: Major revision
This field returns the major revision of the DMA2D IP.
Bits 3:0 MINREV[3:0]: Minor revision
This field returns the minor revision of the DMA2D IP.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
ID[31:16]
r
1514131211109876543210
ID[15:0]
r
Bits 31:0 ID[31:0]: Identification code
These filed returns the identification code of the DMA2D IP.

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ST STM32L4 5 Series Specifications

General IconGeneral
BrandST
ModelSTM32L4 5 Series
CategoryMicrocontrollers
LanguageEnglish

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