Intel Arria 10 User Manual

2.6.2.3. Native PHY IP Parameter Settings for 10GBASE-R, 10GBASE-R with IEEE
1588v2, and 10GBASE-R with FEC
This section contains the recommended parameter values for this protocol. Refer to
Using the Arria 10 Transceiver Native PHY IP Core for the full range of parameter
values.
Table 95. General and Datapath Parameters
The first two sections of the Transceiver Native PHY parameter editor provide a list of general and datapath
options to customize the transceiver.
Parameter Range
Message level for rule violations error, warning
Transceiver Configuration Rule 10GBASE-R
10GBASE-R 1588
10GBASE-R with KR FEC
Transceiver mode TX / RX Duplex, TX Simplex, RX Simplex
Number of data channels 1 to 96
Data rate 10312.5 Mbps
Enable datapath and interface reconfiguration Off
Enable simplified data interface On
Off
Table 96. TX PMA Parameters
Parameter Range
TX channel bonding mode Not bonded
TX local clock division factor 1, 2, 4, 8
Number of TX PLL clock inputs per channel 1, 2, 3, 4
Initial TX PLL clock input selection 0
Table 97. RX PMA Parameters
Parameter Range
Number of CDR reference clocks 1 to 5
Selected CDR reference clock 0 to 4
Selected CDR reference clock frequency
(35)
156.25 MHz, 322.265625 MHz, and 644.53125 MHz
PPM detector threshold 100, 300, 500, 1000
CTLE adaptation mode manual
DFE adaptation mode adaptation enabled, manual, disabled
Number of fixed DFE taps 3, 7, 11
(35)
The CDR reference clock frequency depends on your design settings. Intel recommends that
you verify the link datarates to ensure the CDR locking capability before production.
2. Implementing Protocols in Arria 10 Transceivers
UG-01143 | 2018.06.15
Intel
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10 Transceiver PHY User Guide
132

Intel Arria 10 Specifications

General

Brand	Intel
Model	Arria 10
Category	Transceiver
Language	English