Keysight M8000 Series of BER Test Solutions User Guide 43
Know Your Hardware 2
M8041A Front Panel Connector Inputs/Outputs
Table 9 Channel x Data Inputs/Outputs
Table 10 Clock Inputs/Outputs
The inputs of the M8041A module are sensitive to static electricity.
Therefore, take necessary anti-static precautions, such as wearing a
grounded wrist strap, to minimize the possibility of electrostatic damage.
Component Description
Data Out and /Data Out Differential data outputs (3.5 mm, female).
Data In and /Data In Differential data inputs (3.5 mm, female).
Data Mod In Accepts an external source for data out delay modulation (SMA, female).
Component Description
Clk In External clock input in the range of 8.1 to 16.2 GHz. This input is used as a direct clock for all
channels in forwarded clock applications (SMA, female).
Ref Clk In Reference clock input for applications that provide a host reference clock in the range of 10 MHz to
16 GHz. The clock signal may be SSC modulated and is used as the reference for the system clock of
all Tx and Rx channels. A SSC tolerant PLL is used to multiply the reference clock to the system clock
(SMA, female).
Ref Clk Out The reference clock output is used to provide a 10 MHz or 100 MHz reference clock to the DUT or
other test equipment (SMA, female).
Clk Out and /Clk Out Differential clock output (3.5 mm, female).
Trig Out and /Trig Out This output is used to send a trigger signal to another connected device, such as an oscilloscope (3.5
mm, female). It can also be used as a sub rate clock.
Clk Mod In Input for delay modulation of the Trig Out and Clk Out channel. Both outputs are always affected
(SMA, female).