SP3-XXX (Process)
D0CA/D0C9/D0C8/D0CB 3-138 SM Appendices
SP No. Large Category Small Category ENG
or
CTL
[Min to
Max/Init./Step]
3-232-01
2
Vtref Correct: Pixel:
Set
Low Coverage Coefficient: C ENG
*
[0.0 to 5.0 / 0.3 /
0.1/step]
3-232-01
3
Vtref Correct: Pixel:
Set
Low Coverage Coefficient: M ENG
*
[0.0 to 5.0 / 0.3 /
0.1/step]
3-232-01
4
Vtref Correct: Pixel:
Set
Low Coverage Coefficient: Y ENG
*
[0.0 to 5.0 / 0.3 /
0.1/step]
3-232-02
1
Vtref Correct: Pixel:
Set
High Coverage Coefficient:
Bk
ENG
*
[0.0 to 5.0 / 0.4 /
0.1/step]
3-232-02
2
Vtref Correct: Pixel:
Set
High Coverage Coefficient: C ENG
*
[0.0 to 5.0 / 0.4 /
0.1/step]
3-232-02
3
Vtref Correct: Pixel:
Set
High Coverage Coefficient: M ENG
*
[0.0 to 5.0 / 0.4 /
0.1/step]
3-232-02
4
Vtref Correct: Pixel:
Set
High Coverage Coefficient: Y ENG
*
[0.0 to 5.0 / 0.4 /
0.1/step]
3-232-04
0
Vtref Correct: Pixel:
Set
Initial ProCon Interval ENG
*
[0 to 255 / 6 /
1times/step]
3-232-04
1
Vtref Correct: Pixel:
Set
High Coverage Thresh ENG
*
[0 to 100 / 60 /
1%/step]
3-232-05
0
Vtref Correct: Pixel:
Set
ProCon Interval ENG
*
[0 to 255 / 14 /
1times/step]
3-232-06
0
Vtref Correct: Pixel:
Set
Low Coverage Thresh ENG
*
[0.0 to 100.0 / 100.0 /
0.1%/step]
3-232-07
1
Vtref Correct: Pixel:
Set
TC Upper Limit: Display: Bk ENG
*
[1.0 to 15.0 / 8.5 /
0.1wt%/step]
3-232-07
2
Vtref Correct: Pixel:
Set
TC Upper Limit: Display: C ENG
*
[1.0 to 15.0 / 8.5 /
0.1wt%/step]
3-232-07
3
Vtref Correct: Pixel:
Set
TC Upper Limit: Display: M ENG
*
[1.0 to 15.0 / 8.5 /
0.1wt%/step]
3-232-07
4
Vtref Correct: Pixel:
Set
TC Upper Limit: Display: Y ENG
*
[1.0 to 15.0 / 8.5 /
0.1wt%/step]
3-232-08
1
Vtref Correct: Pixel:
Set
TC Upper Limit Correction:K ENG
*
[0.0 to 5.0 / 0.0 /
0.1wt%/step]
3-232-08
2
Vtref Correct: Pixel:
Set
TC Upper Limit Correction:C ENG
*
[0.0 to 5.0 / 0.5 /
0.1wt%/step]
3-232-08
3
Vtref Correct: Pixel:
Set
TC Upper Limit Correction:M ENG
*
[0.0 to 5.0 / 0.5 /
0.1wt%/step]