ST STM32F102 series

RM0008 Analog-to-digital converter (ADC)
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Figure 28. Dual ADC block diagram
ADCx_IN0
ADCx_IN1
ADCx_IN15
GPIO
Ports
Address/data bus
EXTI_11
EXTI_15
Injected data registers
(4 x 16 bits)
Regular
channels
Injected
channels
ADC2 (Slave)
(12 bits)
Injected data registers
(4 x 16 bits)
Regular
channels
injected
channels
ADC1 (Master)
Dual mode
internal triggers
Start trigger mux
(regular group)
(injected group)
Start trigger mux
control
Temp. sensor
V
REFINT
Regular data register
Note: External triggers are present on ADC2 but are not shown for the purposes of this diagram
(16 bits)
Regular data register
(16 bits)*
* In some dual ADC modes, the ADC1 data register (ADC1_DR) contains both ADC1 and ADC2 regular converted
data over the entire 32 bits.