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ST STM32F102 series User Manual

ST STM32F102 series
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Basic timer (TIM6&7) RM0008
340/690
14.4.6 Counter (TIMx_CNT)
Address offset: 0x24
Reset value: 0x0000
14.4.7 Prescaler (TIMx_PSC)
Address offset: 0x28
Reset value: 0x0000
14.4.8 Auto-reload register (TIMx_ARR)
Address offset: 0x2C
Reset value: 0x0000
1514131211109876543210
CNT[15:0]
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
Bits 15:0 CNT[15:0]: Counter Value.
1514131211109876543210
PSC[15:0]
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
Bits 15:0 PSC[15:0]: Prescaler Value.
The counter clock frequency CK_CNT is equal to f
CK_PSC
/ (PSC[15:0] + 1).
PSC contains the value to be loaded into the active prescaler register at each update event.
1514131211109876543210
ARR[15:0]
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
Bits 15:0 ARR[15:0]: Prescaler Value.
ARR is the value to be loaded into the actual auto-reload register.
Refer to Section 14.3.1: Time-base unit on page 331 for more details about ARR update and
behavior.
The counter is blocked while the auto-reload value is null.

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ST STM32F102 series Specifications

General IconGeneral
BrandST
ModelSTM32F102 series
CategoryMicrocontrollers
LanguageEnglish

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