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ST STM32F102 series User Manual

ST STM32F102 series
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RM0008 Power control (PWR)
51/690
Figure 5. Power on reset/power down reset waveform
4.2.2 Programmable voltage detector (PVD)
You can use the PVD to monitor the V
DD
/V
DDA
power supply by comparing it to a threshold
selected by the PLS[2:0] bits in the Power control register (PWR_CR).
The PVD is enabled by setting the PVDE bit.
A PVDO flag is available, in the Power control/status register (PWR_CSR), to indicate if
V
DD
/V
DDA
is higher or lower than the PVD threshold. This event is internally connected to
the EXTI line16 and can generate an interrupt if enabled through the EXTI registers. The
PVD output interrupt can be generated when V
DD
/V
DDA
drops below the PVD threshold
and/or when V
DD
/V
DDA
rises above the PVD threshold depending on EXTI line16
rising/falling edge configuration. As an example the service routine could perform
emergency shutdown tasks.
Figure 6. PVD thresholds
V
DD
/V
DDA
Reset
40 mV
hysteresis
POR
PDR
Temporization
t
RSTTEMPO
V
DD
/V
DDA
PVD output
100 mV
hysteresis
PVD threshold

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ST STM32F102 series Specifications

General IconGeneral
BrandST
ModelSTM32F102 series
CategoryMicrocontrollers
LanguageEnglish

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