ST STM32F102 series User Manual

Analog-to-digital converter (ADC) RM0008
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10.12.15 ADC register map
The following table summarizes the ADC registers.
Table 49. ADC - register map and reset values
Offset Register
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9 8 7 6 5 4 3 2 1 0
0x00
ADC_SR
Reserved
STRT
JSTRT
JEOC
EOC
AWD
Reset value 00000
0x04
ADC_CR1
Reserved
AWDEN
JAWDEN
Reserved
DUALMOD
[3:0]
DISC
NUM [2:0]
JDISCEN
DISCEN
JAUTO
AWD SGL
SCAN
JEOC IE
AWDIE
EOCIE
AWDCH[4:0]
Reset value 00 00000000000000000000
0x08
ADC_CR2
Reserved
TSVREFE
SWSTART
JSWSTART
EXTTRIG
EXTSEL
[2:0]
Reserved
JEXTTRIG
JEXTSEL
[2:0]
ALIGN
Reserved
DMA
Reserved
RSTCAL
CAL
CONT
ADON
Reset value 0000000 00000 0 0000
0x0C
ADC_SMPR1 Sample time bits SMPx_x
Reset value 00000000000000000000000000000000
0x10
ADC_SMPR2 Sample time bits SMPx_x
Reset value 00000000000000000000000000000000
0x14
ADC_JOFR1
Reserved
JOFFSET1[11:0]
Reset value 000000000000
0x18
ADC_JOFR2
Reserved
JOFFSET2[11:0]
Reset value 000000000000
0x1C
ADC_JOFR3
Reserved
JOFFSET3[11:0]
Reset value 000000000000
0x20
ADC_JOFR4
Reserved
JOFFSET4[11:0]
Reset value 000000000000
0x24
ADC_HTR
Reserved
HT[11:0]
Reset value 000000000000
0x28
ADC_LTR
Reserved
LT[11:0]
Reset value 000000000000
0x2C
ADC_SQR1
Reserved
L[3:0] Regular channel sequence SQx_x bits
Reset value 000000000000000000000000
0x30
ADC_SQR2
Reserved
Regular channel sequence SQx_x bits
Reset value 000000000000000000000000000000
0x34
ADC_SQR3
Reserved
Regular channel sequence SQx_x bits
Reset value 000000000000000000000000000000
0x38
ADC_JSQR
Reserved
JL[1:0] Injected channel sequence JSQx_x bits
Reset value 0000000000000000000000

ST STM32F102 series Specifications

General

Brand	ST
Model	STM32F102 series
Category	Microcontrollers
Language	English