ST STM32F102 series - Figure 98. Counter Timing Diagram, Internal Clock Divided by 1; Figure 99. Counter Timing Diagram, Internal Clock Divided by 2; Figure 100. Counter Timing Diagram, Internal Clock Divided by 4

General-purpose timer (TIMx) RM0008
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Figure 98. Counter timing diagram, internal clock divided by 1
Figure 99. Counter timing diagram, internal clock divided by 2
Figure 100. Counter timing diagram, internal clock divided by 4
CK_INT
00
CNT_EN
Timer clock = CK_CNT
Counter register
Update interrupt flag (UIF)
Counter overflow
Update event (UEV)
01 02 03 04 05 06 0732 33 34 35 3631
CK_INT
0035 0000 0001 0002 0003
CNT_EN
Timer clock = CK_CNT
Counter register
Update interrupt flag (UIF)
0034
0036
Counter overflow
Update event (UEV)
0000 0001
CNT_EN
TImer clock = CK_CNT
Counter register
Update interrupt flag (UIF)
0035
0036
Counter overflow
Update event (UEV)
CK_INT