ST STM32F102 series User Manual

RM0008 Reset and clock control (RCC)
85/690
6.3.5 APB1 peripheral reset register (RCC_APB1RSTR)
Address offset: 0x10
Reset value: 0x0000 0000
Access: no wait state, word, half-word and byte access
Bit 2 IOPARST I/O port A reset
Set and reset by software.
0: No effect
1: Reset I/O port A
Bit 1 Reserved, always read as 0.
Bit 0 AFIORST Alternate function I/O reset
Set and reset by software.
0: No effect
1: Reset Alternate Function
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Reserved
DAC
RST
PWR
RST
BKP
RST
Res.
CAN
RST
Res.
USB
RST
I2C2
RST
I2C1
RST
UART
5
RST
UART
4
RST
USART
3
RST
USART
2
RST
Res.
Res. rw rw rw Res. rw Res. rw rw rw rw rw rw rw res.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
SPI3
RST
SPI2
RST
Reserved
WWD
GRST
Reserved
TIM7
RST
TIM6
RST
TIM5
RST
TIM4
RST
TIM3
RST
TIM2
RST
rw rw Res. rw Res. rw rw rw rw rw rw
Bits 31:30 Reserved, always read as 0.
Bit 29 DACRST DAC interface reset
Set and reset by software.
0: No effect
1: Reset DAC interface
Bit 28 PWRRST Power interface reset
Set and reset by software.
0: No effect
1: Reset power interface
Bit 27 BKPRST Backup interface reset
Set and reset by software.
0: No effect
1: Reset backup interface
Bit 26 Reserved, always read as 0.
Bit 25 CANRST CAN reset
Set and reset by software.
0: No effect
1: Reset CAN
Bit 24 Reserved, always read as 0.

ST STM32F102 series Specifications

General

Brand	ST
Model	STM32F102 series
Category	Microcontrollers
Language	English