RM0008 Debug support (DBG)
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26.16 TPIU (trace port interface unit)
26.16.1 Introduction
The TPIU acts as a bridge between the on-chip trace data from the ITM.
The output data stream encapsulates the trace source ID, that is then captured by a Trace
Port Analyzer (TPA).
The core embeds a simple TPIU, especially designed for low-cost debug (consisting of a
special version of the CoreSight TPIU).
The TPIU only supports ITM debug trace which is a limited trace as it only outputs
information coming from the ITM.
Figure 261. TPIU block diagram
26.16.2 TRACE pin assignment
● Asynchronous mode
The asynchronous mode requires 1 extra pin and is available on all packages. It is only
available if using Serial Wire mode (not in JTAG mode).
● Synchronous mode
The synchronous mode requires from 2 to 6 extra pins depending on the data trace
size and is only available in the larger packages. In addition it is available in JTAG mode
ITM
Asynchronous
FIFO
Formatter
Trace Out
(serializer)
TRACECLKIN
TRACECK
TRACEDATA
[3:0]
TRACESWO
CLK Domain
TRACECLKIN Domain
External PPB Bus
TPIU
TPIU
Table 169. Asynchronous TRACE pin assignment
TPUI pin name
Trace synchronous mode
STM32F10xxx pin
assignment
Type Description
TRACESWO O TRACE Async Data Output PB3
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