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ST STM32F102 series User Manual

ST STM32F102 series
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RM0008 Serial peripheral interface (SPI)
555/690
22.3.9 Disabling the SPI
When transfer is terminated, the application can stop the communication by disabling the
SPI peripheral. This is done by resetting the SPE bit. Disabling the SPI peripheral while the
last data transfer is still ongoing does not affect the data reliability if the device is not in
Master transmit mode.
Note: In Master transmit mode (full-duplex or simplex transmit only), the application must make
sure that no data transfer is ongoing by checking the BSY flag in the SPI_SR register before
disabling the SPI master.
22.3.10 SPI interrupts
22.4 I
2
S functional description
The I
2
S audio protocol is not available in low- and medium-density devices. This section
concerns only high-density devices.
22.4.1 General description
The block diagram of the I
2
S is shown in Figure 210.
Table 146. SPI interrupt requests
Interrupt event Event flag Enable Control bit
Transmit buffer empty flag TXE TXEIE
Receive buffer not empty flag RXNE RXNEIE
Master Mode fault event MODF
ERRIEOverrun error OVR
CRC error flag CRCERR

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ST STM32F102 series Specifications

General IconGeneral
BrandST
ModelSTM32F102 series
CategoryMicrocontrollers
LanguageEnglish

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