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ST STM32F102 series User Manual

ST STM32F102 series
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RM0008 Reset and clock control (RCC)
71/690
Each clock source can be switched on or off independently when it is not used, to optimize
power consumption.
Figure 8. Clock tree
1. When the HSI is used as a PLL clock input, the maximum system clock frequency that can be achieved is
64 MHz.
Several prescalers allow the configuration of the AHB frequency, the high speed APB
(APB2) and the low speed APB (APB1) domains. The maximum frequency of the AHB and
the APB2 domains is 72 MHz. The maximum allowed frequency of the APB1 domain is
36 MHz. The SDIO AHB interface is clocked with a fixed frequency equal to HCLK/2.
The RCC feeds the Cortex System Timer (SysTick) external clock with the AHB clock
divided by 8. The SysTick can work either with this clock or with the Cortex clock (AHB),
HSE OSC
4-16 MHz
OSC_IN
OSC_OUT
OSC32_IN
OSC32_OUT
LSE OSC
32.768 kHz
HSI RC
8 MHz
LSI RC
40 kHz
to Independent Watchdog (IWDG)
PLL
x2, x3, x4
PLLMUL
HSE = High Speed External clock signal
LSE = Low Speed External clock signal
LSI = Low Speed Internal clock signal
HSI = High Speed Internal clock signal
Legend:
MCO
Clock Output
Main
PLLXTPRE
/2
..., x16
AHB
Prescaler
/1, 2..512
/2
PLLCLK
HSI
HSE
APB1
Prescaler
/1, 2, 4, 8, 16
ADC
Prescaler
/2, 4, 6, 8
ADCCLK
PCLK1
HCLK
PLLCLK
to AHB bus, core,
memory and DMA
USBCLK
to USB interface
USB
Prescaler
/1, 1.5
to ADC1, 2 or 3
LSE
LSI
HSI
/128
/2
HSI
HSE
peripherals
to APB1
Peripheral Clock
Enable (20 bits)
Enable (6 bits)
Peripheral Clock
APB2
Prescaler
/1, 2, 4, 8, 16
PCLK2
TIM1 & 8 timers
to TIM1 and TIM8
peripherals to APB2
Peripheral Clock
Enable (15 bits)
Enable (2 bit)
Peripheral Clock
48 MHz
72 MHz max
72 MHz
72 MHz max
36 MHz max
to RTC
PLLSRC
SW
MCO
CSS
to Cortex System timer
/8
Clock
Enable (4 bits)
SYSCLK
max
RTCCLK
RTCSEL[1:0]
TIMxCLK
TIMXCLK
IWDGCLK
SYSCLK
FCLK Cortex
free running clock
/2
TIM2,3,4,5,6,7
to TIM2,3,4,5,6 and 7
To SDIO AHB interface
Peripheral clock
enable
HCLK/2
to FSMC
FSMCCLK
to SDIO
Peripheral clock
enable
Peripheral clock
enable
to I2S3
to I2S2
Peripheral clock
enable
Peripheral clock
enable
I2S3CLK
I2S2CLK
SDIOCLK
ai14752b
If (APB1 prescaler =1) x1
else x2
If (APB2 prescaler =1) x1
else x2

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ST STM32F102 series Specifications

General IconGeneral
BrandST
ModelSTM32F102 series
CategoryMicrocontrollers
LanguageEnglish

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