ST STM32F102 series User Manual

RM0008 Digital-to-analog converter (DAC)
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11.5.10 DUAL DAC 12-bit Left aligned Data Holding Register
(DAC_DHR12LD)
Address offset: 0x24
Reset value: 0x0000 0000
11.5.11 DUAL DAC 8-bit Right aligned Data Holding Register
(DAC_DHR8RD)
Address offset: 0x28
Reset value: 0x0000 0000
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
DACC2DHR[11:0] Reserved
rw rw rw rw rw rw rw rw rw rw rw rw
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
DACC1DHR[11:0] Reserved
rw rw rw rw rw rw rw rw rw rw rw rw
Bits 31:20
DACC2DHR[11:0]: DAC channel2 12-bit Left aligned data
These bits are written by software which specify 12-bit data for DAC channel2.
Bits 19:16 Reserved.
Bits 15:4
DACC1DHR[11:0]: DAC channel1 12-bit Left aligned data
These bits are written by software which specify 12-bit data for DAC channel1.
Bits 3:0 Reserved.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Reserved
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
DACC2DHR[7:0] DACC1DHR[7:0]
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
Bits 31:16 Reserved.
Bits 15:8
DACC2DHR[7:0]: DAC channel2 8-bit Right aligned data
These bits are written by software which specify 8-bit data for DAC channel2
.
Bits 7:0
DACC1DHR[7:0]: DAC channel1 8-bit Right aligned data
These bits are written by software which specify 8-bit data for DAC channel1
.

ST STM32F102 series Specifications

General

Brand	ST
Model	STM32F102 series
Category	Microcontrollers
Language	English