RM0008 Digital-to-analog converter (DAC)
201/690
11.5.6 DAC channel2 12-bit Right aligned Data Holding Register
(DAC_DHR12R2)
Address offset: 0x14
Reset value: 0x0000 0000
11.5.7 DAC channel2 12-bit Left aligned Data Holding Register
(DAC_DHR12L2)
Address offset: 0x18
Reset value: 0x0000 0000
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Reserved
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reserved DACC2DHR[11:0]
rw rw rw rw rw rw rw rw rw rw rw rw
Bits 31:12 Reserved.
Bits 11:0
DACC2DHR[11:0]: DAC channel2 12-bit Right aligned data
These bits are written by software which specify 12-bit data for DAC channel2.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Reserved
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
DACC2DHR[11:0] Reserved
rw rw rw rw rw rw rw rw rw rw rw rw
Bits 31:16 Reserved.
Bits 15:4 DACC2DHR[11:0]: DAC channel2 12-bit Left aligned data
These bits are written by software which specify 12-bit data for DAC channel2.
Bits 3:0 Reserved.
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