EasyManuals Logo

ST STM32F102 series User Manual

ST STM32F102 series
690 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Page #416 background imageLoading...
Page #416 background image
SDIO interface (SDIO) RM0008
416/690
19.3.1 SDIO adapter
Figure 182 shows a simplified block diagram of an SDIO adapter.
Figure 182. SDIO adapter
The SDIO adapter is a multimedia/secure digital memory card bus master that provides an
interface to a multimedia card stack or to a secure digital memory card. It consists of five
subunits:
Adapter register block
Control unit
Command path
Data path
Data FIFO
Note: The adapter registers and FIFO use the AHB bus clock domain (HCLK/2). The control unit,
command path and data path use the SDIO adapter clock domain (SDIOCLK).
Adapter register block
The adapter register block contains all system registers. This block also generates the
signals that clear the static flags in the multimedia card. The clear signals are generated
when 1 is written into the corresponding bit location in the SDIO Clear register.
Table 101. SDIO I/O definitions
Pin Direction Description
SDIO_CK Output
MultiMediaCard/SD/SDIO card clock. This pin is the clock from
host to card.
SDIO_CMD Bidirectional
MultiMediaCard/SD/SDIO card command. This pin is the
bidirectional command/response signal.
SDIO_D[7:0] Bidirectional
MultiMediaCard/SD/SDIO card data. These pins are the
bidirectional databus.
To AHB
interface
ai14740
Control unit
Command
path
Data path
Adapter
registers
FIFO
SDIO_CK
SDIO_CMD
SDIO_D[7:0]
HCLK/2 SDIOCLK
Card bus
SDIO adapter

Table of Contents

Questions and Answers:

Question and Answer IconNeed help?

Do you have a question about the ST STM32F102 series and is the answer not in the manual?

ST STM32F102 series Specifications

General IconGeneral
BrandST
ModelSTM32F102 series
CategoryMicrocontrollers
LanguageEnglish

Related product manuals