Advanced-control timers (TIM1&TIM8) RM0008
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12 Advanced-control timers (TIM1&TIM8)
Low-density devices are STM32F101xx, STM32F102xx and STM32F103xx
microcontrollers where the Flash memory density ranges between 16 and 32 Kbytes.
Medium-density devices are STM32F101xx, STM32F102xx and STM32F103xx
microcontrollers where the Flash memory density ranges between 64 and 128 Kbytes.
High-density devices are STM32F101xx and STM32F103xx microcontrollers where the
Flash memory density ranges between 256 and 512 Kbytes.
This section applies to the STM32F103xx performance line family only.
Low- and medium-density STM32F103xx devices contain one advanced-control timer
(TIM1) whereas high-density STM32F103xx devices feature two advance-control timers
(TIM1 and TIM8).
12.1 TIM1&TIM8 introduction
The advanced-control timers (TIM1&TIM8) consist of a 16-bit auto-reload counter driven by
a programmable prescaler.
It may be used for a variety of purposes, including measuring the pulse lengths of input
signals (input capture) or generating output waveforms (output compare, PWM,
complementary PWM with dead-time insertion).
Pulse lengths and waveform periods can be modulated from a few microseconds to several
milliseconds using the timer prescaler and the RCC clock controller prescalers.
The advanced-control (TIM1&TIM8) and general-purpose (TIMx) timers are completely
independent, and do not share any resources. They can be synchronized together as
described in Section 12.3.20.
12.2 TIM1&TIM8 main features
TIM1&TIM8 timer features include:
● 16-bit up, down, up/down auto-reload counter.
● 16-bit programmable prescaler allowing dividing (also “on the fly”) the counter clock
frequency either by any factor between 1 and 65535.
● Up to 4 independent channels for:
– Input Capture
– Output Compare
– PWM generation (Edge and Center-aligned Mode)
– One-pulse mode output
● Complementary outputs with programmable dead-time
● Synchronization circuit to control the timer with external signals and to interconnect
several timers together.
● Repetition counter to update the timer registers only after a given number of cycles of
the counter.
● Break input to put the timer’s output signals in reset state or in a known state.
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