EasyManuals Logo

ST STM32F102 series User Manual

ST STM32F102 series
690 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Page #647 background imageLoading...
Page #647 background image
RM0008 Universal synchronous asynchronous receiver transmitter (USART)
647/690
Bit 4 NACK: Smartcard NACK enable.
0: NACK transmission in case of parity error is disabled
1: NACK transmission during parity error is enabled.
Note: This bit is not available for UART4 & UART5.
Bit 3 HDSEL: Half-Duplex Selection.
Selection of Single-wire Half-duplex mode
0: Half duplex mode is not selected
1: Half duplex mode is selected
Bit 2 IRLP: IrDA Low-Power.
This bit is used for selecting between normal and low-power IrDA modes
0: Normal mode
1: Low-power mode
Bit 1 IREN: IrDA mode Enable.
This bit is set and cleared by software.
0: IrDA disabled
1: IrDA enabled
Bit 0 EIE: Error Interrupt Enable.
Error Interrupt Enable Bit is required to enable interrupt generation in case of a framing error,
overrun error or noise error (FE=1 or ORE=1 or NE=1 in the USART_SR register) in case of Multi
Buffer Communication (DMAR=1 in the USART_CR3 register).
0: Interrupt is inhibited
1: An interrupt is generated whenever DMAR=1 in the USART_CR3 register and FE=1 or ORE=1
or NE=1 in the USART_SR register.

Table of Contents

Questions and Answers:

Question and Answer IconNeed help?

Do you have a question about the ST STM32F102 series and is the answer not in the manual?

ST STM32F102 series Specifications

General IconGeneral
BrandST
ModelSTM32F102 series
CategoryMicrocontrollers
LanguageEnglish

Related product manuals