DocID024597 Rev 5 157/1830
RM0351 Power control (PWR)
198
The sequence to go from Range 1 to Range 2 is:
1. Reduce the system frequency to a value lower than 26 MHz
2. Adjust number of wait states according new frequency target in Range 2
(LATENCY bits in the FLASH_ACR).
3. Program the VOS bits to “10” in the PWR_CR1 register.
The sequence to go from Range 2 to Range 1 is:
1. Program the VOS bits to “01” in the PWR_CR1 register.
2. Wait until the VOSF flag is cleared in the PWR_SR2 register.
3. Adjust number of wait states according new frequency target in Range 1
(LATENCY bits in the FLASH_ACR).
4. Increase the system frequency.
When supplying VDD12 with an external SMPS, we are defining 3 new states:
• “SMPS range 1”: main regulator is in Range 1 and V
CORE
is supplied by external
SMPS and higher than 1.25 V
• “SMPS range 2 High”: main regulator is in Range 2 and V
CORE
is supplied by external
SMPS and higher than 1.08 V
• “SMPS range 2 Low”: main regulator is in Range 2 and V
CORE
is supplied by external
SMPS and higher than 1.05 V
In order to match the upper rules described in Section 5.1.7: VDD12 domain, the transition
sequences can only be one of the following:
• Range 1 to “SMPS Range 1”:
1. Start SMPS converter (if not always enabled by HW).
2. Check that SMPS converter output is at the correct level ie 1.25 V VDD12 <
1.32 V.
3. Connect VDD12 to external SMPS converter through the switch.
• Range 2 to “SMPS Range 2 Low & High”:
1. Start SMPS (if not always enabled by HW).
2. Check that SMPS output is at the correct level ie 1.05 V VDD12 < 1.32 V.
3. Connect VDD12 to external SMPS converter through the switch.
If 1.08 V VDD12 (ie SMPS Range 2 High), then the following steps can be applied:
1. Adjust the number of wait states in the FLASH_ACR (up to max frequency of
Range 1 refer to Section 3.3.3: Read access latency).
2. Increase the system frequency up to the maximum allowed value for Voltage
Range 1 (ie 80 MHz).
• “SMPS Range 1” to Range 1:
or
• SMPS Range 2 Low & High” to Range 2:
1. If in Range 1, reduce the system frequency to a value lower or equal to 26 MHz.
2. Adjust number of wait states according new frequency target corresponding to
Voltage Range (LATENCY bits in the FLASH_ACR).
3. Disconnect VDD12 by opening the switch.
4. Stop SMPS (if required and not kept always enabled).
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