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ST STM32F102 series User Manual

ST STM32F102 series
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RM0008 Advanced-control timers (TIM1&TIM8)
259/690
Input capture mode
Bits 15:12 IC2F: Input Capture 2 Filter.
Bits 11:10 IC2PSC[1:0]: Input Capture 2 Prescaler.
Bits 9:8 CC2S: Capture/Compare 2 Selection.
This bit-field defines the direction of the channel (input/output) as well as the used input.
00: CC2 channel is configured as output.
01: CC2 channel is configured as input, IC2 is mapped on TI2.
10: CC2 channel is configured as input, IC2 is mapped on TI1.
11: CC2 channel is configured as input, IC2 is mapped on TRC. This mode is working only if an
internal trigger input is selected through TS bit (TIMx_SMCR register)
Note: CC2S bits are writable only when the channel is OFF (CC2E = ‘0’ in TIMx_CCER).
Bits 7:4 IC1F[3:0]: Input Capture 1 Filter.
This bit-field defines the frequency used to sample TI1 input and the length of the digital filter applied
to TI1. The digital filter is made of an event counter in which N events are needed to validate a
transition on the output:
0000: No filter, sampling is done at f
DTS
.
0001: f
SAMPLING
=f
CK_INT
, N=2.
0010: f
SAMPLING
=f
CK_INT
, N=4.
0011: f
SAMPLING
=f
CK_INT
, N=8.
0100: f
SAMPLING
=f
DTS
/2, N=6.
0101: f
SAMPLING
=f
DTS
/2, N=8.
0110: f
SAMPLING
=f
DTS
/4, N=6.
0111: f
SAMPLING
=f
DTS
/4, N=8.
1000: f
SAMPLING
=f
DTS
/8, N=6.
1001: f
SAMPLING
=f
DTS
/8, N=8.
1010: f
SAMPLING
=f
DTS
/16, N=5.
1011: f
SAMPLING
=f
DTS
/16, N=6.
1100: f
SAMPLING
=f
DTS
/16, N=8.
1101: f
SAMPLING
=f
DTS
/32, N=5.
1110: f
SAMPLING
=f
DTS
/32, N=6.
1111: f
SAMPLING
=f
DTS
/32, N=8.
Bits 3:2 IC1PSC: Input Capture 1 Prescaler.
This bit-field defines the ratio of the prescaler acting on CC1 input (IC1).
The prescaler is reset as soon as CC1E=’0’ (TIMx_CCER register).
00: no prescaler, capture is done each time an edge is detected on the capture input.
01: capture is done once every 2 events.
10: capture is done once every 4 events.
11: capture is done once every 8 events.
Bits 1:0 CC1S: Capture/Compare 1 Selection.
This bit-field defines the direction of the channel (input/output) as well as the used input.
00: CC1 channel is configured as output.
01: CC1 channel is configured as input, IC1 is mapped on TI1.
10: CC1 channel is configured as input, IC1 is mapped on TI2.
11: CC1 channel is configured as input, IC1 is mapped on TRC. This mode is working only if an
internal trigger input is selected through TS bit (TIMx_SMCR register)
Note: CC1S bits are writable only when the channel is OFF (CC1E = ‘0’ in TIMx_CCER).

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ST STM32F102 series Specifications

General IconGeneral
BrandST
ModelSTM32F102 series
CategoryMicrocontrollers
LanguageEnglish

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