ST STM32F102 series - Page 531

RM0008 Controller area network (bxCAN)
531/690
Mailbox data high register (CAN_TDHxR) (x=0..2)
All bits of this register are write protected when the mailbox is not in empty state.
Address offsets: 0x18C, 0x19C, 0x1AC
Reset value: 0xXX where X is undefined
Rx FIFO mailbox identifier register (CAN_RIxR) (x=0..1)
Address offsets: 0x1B0, 0x1C0
Reset value: 0xXX where X is undefined
Note: All RX registers are write protected.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
DATA7[7:0] DATA6[7:0]
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
1514131211109876543210
DATA5[7:0] DATA4[7:0]
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
Bits 31:24 DATA7[7:0]: Data Byte 7
Data byte 7 of the message.
Note: if TGT of this message and TTCM are active, DATA7 and DATA6 will be replaced by the TIME
stamp value.
Bits 23:16 DATA6[7:0]: Data Byte 6
Data byte 6 of the message.
Bits 15:8 DATA5[7:0]: Data Byte 5
Data byte 5 of the message.
Bits 7:0 DATA4[7:0]: Data Byte 4
Data byte 4 of the message.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
STID[10:0]/EXID[28:18] EXID[17:13]
rrrrrrrrrrrrrrrr
1514131211109876543210
EXID[12:0] IDE RTR
Res.
rrrrrrrrrrrrrrr
Bits 31:21 STID[10:0]/EXID[28:18]: Standard Identifier or Extended Identifier
The standard identifier or the MSBs of the extended identifier (depending on the IDE bit value).
Bits 20:3 EXID[17:0]: Extended Identifier
The LSBs of the extended identifier.