RM0008 Revision history
685/690
22-May-2008
continued
4
continued
Figure 204: CAN frames on page 516 modified. Bits 31:21 and bits 20:3
modified in TX mailbox identifier register (CAN_TIxR) (x=0..2) on page 529.
Bits 31:21 and bits 20:3 modified in Rx FIFO mailbox identifier register
(CAN_RIxR) (x=0..1) on page 531.
Section 23.3.7: DMA requests on page 593 modified. DMAEN bit 11
description modified in Section 23.6.2: Control register 2 (I2C_CR2) on
page 599.
Clock phase and clock polarity on page 548 modified. Transmit sequence on
page 550 modified. Receive sequence on page 551 added. Reception
sequence on page 567 modified. Underrun flag (UDR) on page 568
modified.
I
2
S feature added (see Section 22: Serial peripheral interface (SPI) on
page 543).
In Section 26: Debug support (DBG) on page 653:
– DBGMCU_IDCODE on page 659 and DBGMCU_CR on page 671
updated
– TMC TAP changed to boundary scan TAP
– Address onto which DBGMCU_CR is mapped modified in
Section 26.15.3: Debug MCU configuration register on page 671.
Section 25: Device electronic signature on page 650 added.
REV_ID(15:0) definition modified in Section 26.6.1: MCU device ID code on
page 659.
Table 174. Document revision history (continued)
Date Revision Changes
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