EasyManuals Logo

ST STM32G471 User Manual

ST STM32G471
2126 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Page #1053 background imageLoading...
Page #1053 background image
RM0440 Rev 4 1053/2126
RM0440 High-resolution timer (HRTIM)
1083
Bit 16 ADC3TBC3: ADC trigger 3 on timer B compare 3
Refer to ADC3TFC2 description.
Bit 15 ADC3TFC3: ADC trigger 3 on timer F compare 3
Refer to ADC3TFC2 description.
Bit 14 ADC3TARST: ADC trigger 3 on timer A reset and counter roll-over
This bit enables the generation of an ADC trigger upon timer A reset and roll-over event, on ADC
trigger 1 output.
Bit 13 ADC3TAPER: ADC trigger 3 on timer A period
This bit enables the generation of an ADC trigger upon timer A period event, on ADC trigger 1
output.
Bit 12 ADC3TAC4: ADC trigger 3 on timer A compare 4
Refer to ADC3TFC2 description.
Bit 11 ADC3TAC3: ADC trigger 3 on timer A compare 3
Refer to ADC3TFC2 description.
Bit 10 ADC3TFC2: ADC trigger 3 on timer F compare 2
This bit enables the generation of an ADC trigger upon timer F compare 2 event, on ADC trigger 3
output.
Bit 9 ADC3EEV5: ADC trigger 3 on external event 5
Refer to ADC3EEV1 description.
Bit 8 ADC3EEV4: ADC trigger 3 on external event 4
Refer to ADC3EEV1 description.
Bit 7 ADC3EEV3: ADC trigger 3 on external event 3
Refer to ADC3EEV1 description.
Bit 6 ADC3EEV2: ADC trigger 3 on external event 2
Refer to ADC3EEV1 description.
Bit 5 ADC3EEV1: ADC trigger 3 on external event 1
This bit enables the generation of an ADC trigger upon external event 1, on ADC trigger 3 output.
Bit 4 ADC3MPER: ADC trigger 3 on master period
This bit enables the generation of an ADC trigger upon master timer period event, on ADC trigger 3
output.
Bit 3 ADC3MC4: ADC trigger 3 on master compare 4
Refer to ADC3MC1 description.
Bit 2 ADC3MC3: ADC trigger 3 on master compare 3
Refer to ADC3MC1 description.
Bit 1 ADC3MC2: ADC trigger 3 on master compare 2
Refer to ADC3MC1 description.
Bit 0 ADC3MC1: ADC trigger 3 on master compare 1
This bit enables the generation of an ADC trigger upon master compare 1 event, on ADC trigger 3
output.

Table of Contents

Questions and Answers:

Question and Answer IconNeed help?

Do you have a question about the ST STM32G471 and is the answer not in the manual?

ST STM32G471 Specifications

General IconGeneral
BrandST
ModelSTM32G471
CategoryMicrocontrollers
LanguageEnglish

Related product manuals