RM0440 Rev 4 911/2126
RM0440 High-resolution timer (HRTIM)
1083
TIMx update triggered by the master timer update
The sources listed in Table 227 are generating a master timer update. The table indicates if
the source event can be used to trigger a simultaneous update in any of TIMx timing units.
Operating condition: MSTU bit is set in HRTIM_TIMxCR register.
TIMx update triggered by the TIMy update
The sources listed in Table 228 are generating a TIMy update. The table indicates if the
given event can be used to trigger a simultaneous update in another or multiple TIMx timers.
Operating condition: TyU bit set in HRTIM_TIMxCR register (source = TIMy and
destination = TIMx).
Table 227. Master timer update event propagation
Source Condition Propagation Comment
Burst DMA end BRSTDMA[1:0] = 01 No Must be done in TIMxCR (UPDGAT[3:0] = 0001)
Roll-over event following
a burst DMA end
BRSTDMA[1:0] = 10 Yes -
Repetition event caused
by a counter roll-over
MREPU = 1
Yes -
Repetition event caused
by a counter reset (from
HRTIM_SCIN or
software)
No -
Software update MSWU = 1 No
All software update bits (TxSWU) are grouped in
the HRTIM_CR2 register and can be used for a
simultaneous update
Table 228. TIMx update event propagation
Source Condition Propagation Comment
Burst DMA end UPDGAT[3:0] = 0001 No
Must be done directly in HRTIM_TIMxCR
(UPDGAT[3:0] = 0001)
Update caused by the
update enable inputs
hrtim_upd_en[3:1]
UPDGAT[3:0] = 0011,
0100, 0101
No
Must be done directly in HRTIM_TIMxCR
(UPDGAT[3:0] = 0011, 0100, 0101
Master update
MSTU = 1 in
HRTIM_TIMyCR
No
Must be done with MSTU = 1 in HRTIM_TIMxCR
Another TIMx update
(TIMz>TIMy>TIMx)
TzU=1 in
HRTIM_TIMyCR
TyU=1 in TIMxCR
No
Must be done with TzU=1 in HRTIM_TIMxCR
TzU=1 in HRTIM_TIMyCR
Repetition event caused
by a counter roll-over
TyREPU = 1 Yes -
Repetition event caused
by a counter reset
TyREPU = 1 - Refer to counter reset cases below
Counter roll-over TyRSTU = 1 Yes -
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