ST STM32G471 User Manual

Analog-to-digital converters (ADC) RM0440
654/2126 RM0440 Rev 4
Figure 121. AUTODLY=1, regular HW conversions interrupted by injected conversions
(DISCEN=0; JDISCEN=0)
1. AUTDLY=1
2. Regular configuration: EXTEN[1:0]=01 (HW trigger), CONT=0, DISCEN=0, CHANNELS = 1, 2, 3
3. Injected configuration: JEXTEN[1:0]=01 (HW Trigger), JDISCEN=0, CHANNELS = 5,6
MS31021V2
Injected
trigger
regular
JEOS
ADC_JDR1
ADC_JDR2
Regular
trigger
injected
regular
regular
DLY (CH1)
DLY (CH2)
DLY (inj)
DLY (CH3)
Not ignored
(occurs during injected sequence)
Ignored
DLY (CH1)
regular
Ignored
ADC_DR
EOC
EOS
ADC_DR
read access
by s/w by h/w
Indicative timings
RDY
CH1
DLY
CH5
CH2
DLY
CH6
CH3
CH1
DLY
DLY
D1
D1
D2 D3
CH2
D6
D5
injected
regular
ADC state

ST STM32G471 Specifications

General

Brand	ST
Model	STM32G471
Category	Microcontrollers
Language	English