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ST STM32G471 User Manual

ST STM32G471
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RM0440 Rev 4 1879/2126
RM0440 Inter-integrated circuit (I2C) interface
1928
Figure 640. Transfer sequence flowchart for slave receiver with NOSTRETCH=1
Figure 641. Transfer bus diagrams for I2C slave receiver
MS19856V2
Slave initialization
Slave reception
Read I2C_RXDR.RXDATA
I2C_ISR.STOPF
=1?
No
Yes
I2C_ISR.RXNE
=1?
Yes
No
Set I2C_ICR.STOPCF
MS19857V2
EV1: ADDR ISR: check ADDCODE and DIR, set ADDRCF
EV2: RXNE ISR: rd data1
EV3 : RXNE ISR: rd data2
EV4: RXNE ISR: rd data3
A
ADDR
AA
RXNE
A
RXNE
RXNE
legend:
transmission
reception
SCL stretch
EV1 EV2 EV3
EV1: RXNE ISR: rd data1
EV2: RXNE ISR: rd data2
EV3: RXNE ISR: rd data3
EV4: STOPF ISR: set STOPCF
A
AA A
RXNE
legend:
transmission
reception
SCL stretch
RXNE
EV4
Example I2C slave receiver 3 bytes, NOSTRETCH=1:
S
Address data 1 data 2 data 3
P
Example I2C slave receiver 3 bytes, NOSTRETCH=0:
S
Address data1 data2 data3
EV3
EV2
EV1
RXNE RXNE RXNE

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ST STM32G471 Specifications

General IconGeneral
BrandST
ModelSTM32G471
CategoryMicrocontrollers
LanguageEnglish

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