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ST STM32G471 User Manual

ST STM32G471
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RM0440 Rev 4 385/2126
RM0440 Peripherals interconnect matrix
401
The burst mode controller counter can be clocked by general purpose timers as well as
shown in the Table 62.
The HRTIM can be synchronized by external sources as shown in the Table 64.
Some of the TIMx timers are linked together internally for timer synchronization or chaining.
When one timer is configured in Master Mode, it can reset, start, stop or clock the counter of
another timer configured in Slave Mode.
A description of the feature is provided in: Section 28.3.30: Timer synchronization.
The modes of synchronization are detailed in:
Section 28.3.30: Timer synchronization for advanced-control timers
(TIM1/TIM8/TIM20)
Section 29.4.23: Timer synchronization for general-purpose timers
(TIM2/TIM3/TIM4/TIM5)
Section 30.4.25: Timer synchronization (TIM15) for general-purpose timer (TIM15)
Table 62. Interconnect 12
HRTIM Burst mode trigger event/ clock signal
HRTIM Burst mode trigger event/ clock signal
assignment
hrtim_bm_trg tim7_trgo
hrtim_bm_ck1 tim16_oc
hrtim_bm_ck2 tim17_oc
hrtim_bm_ck3 tim7_trgo‘
Table 63. Interconnect 13
HRTIM update enable signal HRTIM update enable assignment
hrtim_upd_en1 tim16_oc
hrtim_upd_en2 tim17_oc
hrtim_upd_en3 tim6_oc
Table 64. Interconnect 14
HRTIM synchronization signals HRTIM synchronization signal assignment
hrtim_in_sync2 tim1_trgo
hrtim_in_sync3 HRTIM_SCIN

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ST STM32G471 Specifications

General IconGeneral
BrandST
ModelSTM32G471
CategoryMicrocontrollers
LanguageEnglish

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