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ST STM32G471

ST STM32G471
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RM0440 Rev 4 641/2126
RM0440 Analog-to-digital converters (ADC)
724
Figure 108. Flushing JSQR queue of context by setting JADSTP=1 (JQM=1)
1. Parameters:
P1: sequence of 1 conversion, hardware trigger 1
P2: sequence of 1 conversion, hardware trigger 1
P3: sequence of 1 conversion, hardware trigger 1
Figure 109. Flushing JSQR queue of context by setting ADDIS=1 (JQM=0)
1. Parameters:
P1: sequence of 1 conversion, hardware trigger 1
P2: sequence of 1 conversion, hardware trigger 1
P3: sequence of 1 conversion, hardware trigger 1
JSQR queue
Write JSQR
P1
P1
P2
EMPTY
Trigger 1
ADC state
RDY
STP
P3
P1 P3
P1, P2
EMPTY
JADSTP
RDY
P3
RDY
Queue is flushed and
becomes empty (P2 is lost)
(Aborted)
JADSTART
ADC J context
(returned by reading JSQR)
Set
by S/W
Reset
by H/W
MS30545V1
Conversion1
Conv1
Reset
by H/W
Set
by S/W
EMPTY
EMPTY (0x0000)
EMPTY
Ignored
EMPTY
JSQR queue
ADC state
RDY
P1
P1, P2
REQ-OFF
P1
ADDIS
Queue is flushed and maintains
the last active context
(P2 which was not consumed is lost)
ADC J context
(returned by reading JSQR)
Set
by S/W
Reset
by H/W
MS30546V1
OFF

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