ST STM32G471 - Figure 368. Counter Timing Diagram, Internal Clock Divided by 2; Figure 369. Counter Timing Diagram, Internal Clock Divided by 4

General-purpose timers (TIM2/TIM3/TIM4/TIM5) RM0440
1242/2126 RM0440 Rev 4
Figure 368. Counter timing diagram, internal clock divided by 2
Figure 369. Counter timing diagram, internal clock divided by 4
MSv62306V1
tim_psc_ck
CEN
tim_cnt_ck
Counter register
Update event (UEV)
Counter underflow
Update interrupt flag
(UIF)
0002
0001
0000
0036
0035
0034
0033
MSv62307V1
0000 0001
0001
0000
tim_psc_ck
tim_cnt_ck
Counter register
Update event (UEV)
Counter underflow
Update interrupt flag
(UIF)
CEN