Debug support (DBG) RM0440
2080/2126 RM0440 Rev 4
47 Debug support (DBG)
47.1 Overview
The STM32G4 Series devices are built around a Cortex
®
-M4 with FPU core which contains
hardware extensions for advanced debugging features. The debug extensions allow the
core to be stopped either on a given instruction fetch (breakpoint) or data access
(watchpoint). When stopped, the core’s internal state and the system’s external state may
be examined. Once examination is complete, the core and the system may be restored and
program execution resumed.
The debug features are used by the debugger host when connecting to and debugging the
STM32G4 Series MCUs.
Two interfaces for debug are available:
• Serial wire
• JTAG debug port
Figure 684. Block diagram of STM32 MCU and Cortex
®
-M4 with FPU-level
debug support
Note: The debug features embedded in the Cortex
®
-M4 with FPU core are a subset of the Arm
®
CoreSight Design Kit.
Cortex-M4
Core
SWJ-DP
AHB-AP
Bridge
NVIC
DWT
FPB
ITM
ETM
DCode
interface
System
interface
Internal private
peripheral bus (PPB)
External private
peripheral bus (PPB)
Bus matrix
Data
Trace port
DBGMCU
STM32 MCU debug suppo rt
Cortex-M4 debug support
JTMS/
JTDI
JTDO/
NJTRST
JTCK/
SWDIO
SWCLK
TRACESWO
TRACESWO
TRACECK
TRACED[3:0]
TPIU
MS19234V1
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