RM0440 Rev 4 1583/2126
RM0440 Tamper and backup registers (TAMP)
1592
36.4 TAMP low-power modes
36.5 TAMP interrupts
The interrupt channel is set in the interrupt status register. The interrupt output is also
activated.
36.6 TAMP registers
Refer to Section 1.2 on page 72 of the reference manual for a list of abbreviations used in
register descriptions. The peripheral registers can be accessed by words (32-bit).
Table 340. Effect of low-power modes on TAMP
Mode Description
Sleep
No effect.
TAMP interrupts cause the device to exit the Sleep mode.
Stop
No effect on all features, except for level detection with filtering mode which remain
active only when the clock source is LSE or LSI.
Tamper events cause the device to exit the Stop mode.
Standby
No effect on all features, except for level detection with filtering mode which remain
active only when the clock source is LSE or LSI.Tamper events cause the device to exit
the Standby mode.
Shutdown
No effect on all features, except for level detection with filtering mode which remain
active only when the clock source is LSE. Tamper events cause the device to exit the
Shutdown mode.
Table 341. Interrupt requests
Interrupt
acronym
Interrupt
event
Event flag
(1)
Enable
control bit
(2)
Interrupt
clear
method
Exit from
Sleep
mode
Exit from
Stop and
Standby
modes
Exit from
Shutdown
mode
TAMP
Tam p e r x
(3)
TAMPxF TAMPxIE
Write 1 in
CTAMPxF
Yes Yes
(4)
Yes
(5)
Internal
tamper y
(3)
ITAMPyF ITAMPyIE
Write 1 in
CITAMPxF
Yes Yes
(4)
Yes
(5)
1. The event flags are in the TAMP_SR register.
2. The interrupt masked flags (resulting from event flags AND enable control bits) are in the TAMP_MISR register.
3. The number of tampers and internal tampers events depend on products.
4. In case of level detection with filtering passive tamper mode, wakeup from Stop and Standby modes is possible only when
the TAMP clock source is LSE or LSI.
5. In case of level detection with filtering passive tamper mode, wakeup from Shutdown modes is possible only when the
TAMP clock source is LSE.