Flexible static memory controller (FSMC) RM0440
546/2126 RM0440 Rev 4
9 WAITPOL To be set according to memory
8 BURSTEN 0x1
7 Reserved 0x1
6 FACCEN Set according to memory support (NOR Flash memory)
5-4 MWID As needed
3-2 MTYP 0x1 or 0x2
1 MUXEN As needed
0 MBKEN 0x1
Table 146. FMC_BTRx bitfields (Synchronous multiplexed read mode)
Bit number Bit name Value to set
31:30 DATAHLD Don’t care
29:28 ACCMOD 0x0
27-24 DATLAT Data latency
27-24 DATLAT Data latency
23-20 CLKDIV
0x0 to get CLK = HCLK
0x1 to get CLK = 2 × HCLK
..
19-16 BUSTURN Time between NEx high to NEx low (BUSTURN HCLK).
15-8 DATAST Don’t care
7-4 ADDHLD Don’t care
3-0 ADDSET Don’t care
Table 145. FMC_BCRx bitfields (Synchronous multiplexed read mode) (continued)
Bit number Bit name Value to set
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